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| Data Sheet No.PD60156-K IPS511G/IPS512G FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH Features * * * * * * * Over temperature protection (with auto-restart) Short-circuit protection (current limit) Active clamp E.S.D protection Status feedback Open load detection Logic ground isolated from power ground Product Summary Rds(on) V clamp I Limit V open load 150m (max) 50V 5A 3V Description The IPS511G/IPS512G are fully protected five terminal high side switches with built in short-circuit, over-temperature, ESD protection, inductive load capability and diagnostic feedback. The output current is controlled when it reaches Ilim value. The current limitation is activated until the thermal protection acts. The over-temperature protection turns off the high side switch if the junction temperature exceeds Tshutdown. It will automatically restart after the junction has cooled 7oC below Tshutdown. A diagnostic pin is provided for status feedback of short-circuit, overtemperature and open load detection. The double level shifter circuitry allows large offsets between the logic ground and the load ground. Truth Table Op. Conditions Normal Normal Open load Open load Over current Over current Over-temperature Over-temperature In Out H H L L H H L H H L (limiting) L L H L (cycling) L L Dg H L H H L L L L Typical Connection + VCC + 5v 15K Status feedback Rdg Rin Output pull-up resistor Available Package Vcc Dg Logic control Out In Gnd 8 Lead SOIC (Single) IPS511G Logic signal Load Logic Gnd Load Gnd 16 Lead SOIC (Dual) IPS512G www.irf.com 1 IPS511G/IPS512G Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are referenced to GROUND lead. (Tj = 25oC unless otherwise specified). Symbol Parameter Vout Voffset Vin Iin, max Vdg Idg, max Isd cont. Maximum output voltage Maximum Input voltage Maximum IN current Maximum diagnostic output voltage Maximum diagnostic output current Diode max. continuous current (1) (IPS511G) (per leg/both legs ON - IPS512G) Isd pulsed Diode max. pulsed current (1) ESD1 ESD2 Pd Electrostatic discharge voltage (Human Body) Electrostatic discharge voltage (Machine Model) Maximum power dissipation (rth=125oC/W) IPS511G (rth=85oC/W, Tj max. Vvv max both legs on) IPS512G Max. storage & operating junction temp. Maximum Vcc voltage Min. Vcc-50 -0.3 -5 -0.3 -1 -- -- -- -- -- -- -- -40 -- Max. Vcc+0.3 Vcc+0.3 5.5 10 5.5 10 1.4 0.8 10 4000 500 1 1.5 +150 50 Units V Test Conditions Maximum logic ground to load ground offset Vcc-50 mA V mA A C=100pF, R=1500, V C=200pF, R=0, L=10H W o C V Thermal Characteristics Symbol Parameter Rth1 Rth2 Rth1 Thermal resistance with standard footprint Thermal resistance with 1" square footprint Thermal resistance with standard footprint (2 mos on) (2 mosfets on) Rth2 (1) Thermal resistance with standard footprint (1 mos on) (1 mosfet on) Rth2 Thermal resistance with 1" square footprint (2 mos on) (2 mosfets on) Min. -- -- -- -- -- Typ. & 85 100 # Max. Units Test Conditions a a -- -- -- o 8 Lead SOIC C/W 16 Lead SOIC (1) Limited by junction temperature (pulsed current limited also by internal wiring) 2 www.irf.com IPS511G/IPS512G Recommended Operating Conditions These values are given for a quick design. For operation outside these conditions, please consult the application notes. Symbol Parameter Continuous Vcc voltage High level input voltage Low level input voltage Continuous output current Tamb=85 oC (TAmbient = 85oC, Tj = 125oC, rth = 100oC/W) IPS511G Iout Continuous output current per leg Tamb=85 oC (TAmbient = 85oC, Tj = 125oC Rth = 85oC/W both legs on) IPS512G Rin Recommended resistor in series with IN pin Rdg Recommended resistor in series with DG pin Vcc VIH VIL Iout Min. 5.5 4 -0.3 -- -- 4 10 Max. 35 5.5 0.9 1.4 1.0 6 20 Units V A k Static Electrical Characteristics (Tj = 25oC, Vcc = 14V unless otherwise specified.) Symbol Parameter Rds(on) @Tj=25o C Min. -- -- -- 5.5 50 -- -- -- -- -- -- -- 0 -- -- 1 -- 0.1 Typ. 130 130 220 -- 56 58 0.9 16 0.7 20 0.15 60 -- -- 2.3 2 70 0.25 Max. Units Test Conditions 150 150 -- 35 -- 65 1.2 50 2 -- 0.4 120 25 10 2.5 -- 200 0.5 Vin = 5V, Iout = 2.5A m Vin = 5V, Iout = 1A Vin = 5V, Iout = 2.5A ON state resistance Tj = 25oC ON state resistance @ Vcc = 6V ON state resistance Tj = 150oC Operating voltage range Vcc to OUT clamp voltage 1 Vcc to OUT clamp voltage 2 Body diode forward voltage Supply current when OFF Supply current when ON Ripple current when ON (AC RMS) Low level diagnostic output voltage Output leakage current Output leakage current Diagnostic output leakage current IN high threshold voltage IN low threshold voltage On state IN positive current Input hysteresis Rds(on) (V cc=6V) Rds(on) @Tj=150oC Vcc oper. V clamp 1 V clamp 2 Vf Icc off Icc on Icc ac Vdgl Iol Iol Idg leakage V A mA A V A Id = 10mA (see Fig.1 & 2) Id = Isd (see Fig.1 & 2) Id = 2.5A, Vin = 0V Vin = 0V, Vout = 0V Vin = 5V Vin = 5V Idg = 1.6 mA Vout = 6V Vout = 0V Vdg = 5.5V Vih Vil Iin, on In, hyst. V A V Vin = 5V www.irf.com 3 IPS511G/IPS512G Switching Electrical Characteristics Vcc = 14V, Resistive Load = 5.6, Tj = 25oC, (unless otherwise specified). Symbol Parameter Tdon Tr1 Tr2 Turn-on delay time Rise time to Vout = Vcc - 5V Rise time from the end of TR1 to Vout = 90% of Vcc dV/dt (on) Turn ON dV/dt E on Turn ON energy Tdoff Turn-off delay time Tf Fall time to Vout = 10% of Vcc dV/dt (off) Turn OFF dV/dt Eoff Turn OFF energy Tdiag Vout to Vdiag propagation delay Min. -- -- -- -- -- -- -- -- -- -- Typ. Max. Units Test Conditions 7 10 45 1.3 400 15 10 2 80 5 50 50 95 4 -- 50 50 6 -- 15 s V/s J s V/s J s See figure 3 See figure 4 Protection Characteristics Symbol Parameter Ilim Internal current limit Tsd+ Over-temp. positive going threshold TsdOver-temp. negative going threshold Vsc Short-circuit detection voltage (3) Vopen load Open load detection threshold (3) Referenced to Vcc Min. 3 -- -- 2 2 Typ. 5 165 158 3 3 Max. Units Test Conditions 7 -- -- 4 4 A oC oC V V Vout = 0V See fig. 2 See fig. 2 See fig. 2 Lead Assignments Vcc Vcc Vcc Vcc In1 Gnd1 Vcc Vcc Vcc Vcc Out2 Dg2 1 1 GND IN DG OUT Dg1 Out1 Vcc Vcc Vcc Vcc Gnd2 In2 8 Lead SOIC 16 Lead SOIC IPS511G Part Number IPS512G 4 www.irf.com IPS511G/IPS512G Functional Block Diagram All values are typical VCC Under voltage lock out 50V Over temperature 165C 158C Tj 62 V Charge pump 2.7 V IN 7V 200 K 2.2 V Level shift driver - DG 7V 40 + Open load 3V Current limit + 5A + Short-circuit - 3V GND VOUT T clamp Vin 5V 0V Vin Iout Ilim. limiting T shutdown cycling Iout ( + Vcc ) 0V Out T V clamp Tsd+ Tsd- ) (160 ( see Appl . Notes to evaluate power dissipation ) Figure 1 - Active clamp waveforms Figure 2 - Protection timing diagram www.irf.com 5 IPS511G/IPS512G Vin Vcc 90% Vcc - 5V Vin Vout 10% Td on dV/dt on 90% dV/dt off Tr 1 Vout Tr 2 E1(t) 10% Td off Tf E2 (t) Iout1 Eon1 Resistive load Inductive load Eon2 Iout2 Figure 3 - Switching times definition (turn-on) Turn on energy with a resistive or an inductive load Figure 4 - Switching times definition (turn-off) V in Dg Vcc IN Out Gnd + Vcc Vcc -Vsc Vin Vout L 14 V - V o ut Vol R V d ia g Iout Diag on blanking Diag off blanking T diag 5v 0v Rem : V load is negative during demagnetization Figure 5 - Active clamp test circuit Figure 6 - Diagnostic delay definitions 6 www.irf.com IPS511G/IPS512G 150 2 00 % 100 1 50 % 50 1 00 % 0 0 5 10 15 20 25 30 35 5 0% -5 0 0 50 100 150 Figure 7 - Rds(on) (m) Vs Vcc (V) Figure 8 - Normalized Rds(on) Vs Tj (oC) 150 10 100 1 50 0.1 0 0 1 2 3 4 5 Figure 10 - Max. Iout (A) Vs Load Inductance (uH) Figure 9 - Rds(on) (m) Vs Iout (A) www.irf.com 7 IPS511G/IPS512G 5 5 4 1inch footprint Rthja= 60C/W 4 3 3 Standard footprint one leg on 2 Standard footprint Rth=100C/W 2 1 1 Standard footprint both legs on 0 25 50 75 100 125 150 0 25 50 75 100 125 150 Figure 11a - Max load current (A) Vs Tamb (oC) IPS511G Figure 11b - Max load current (A) Vs Tamb (oC) IPS512G 10 0 6 5 10 4 1 3 2 0,1 1 0,01 1E+00 1E+01 1E+02 1E+03 1E-05 1E-04 1E-03 1E-02 1E-01 0 -50 0 50 100 150 Figure 12 - Transient Thermal Impedance (oC/W) Vs Time (S) - IPS511G/IPS512G Figure 13 - Ilim (A) Vs Tj (oC) 8 www.irf.com IPS511G/IPS512G 600 Resistive load 10000 1000 Eon 400 Eoff 100 I=Imax vs Induct.(see fig.10) I=1.5A 200 10 1 0 1E+01 1E+02 1E+03 1E+04 1E+05 1E+06 0 1 2 3 0.1 Figure 14 - Eon, Eoff (J) vs I (A) Figure 15 - Eon (J) Vs Load Inductance (H) (see Fig. 3) 150 125 Diag on blanking 100 75 50 25 Diag off blanking 0 0 1 2 3 1.00E-03 1.00E-04 1.00E-05 1.00E-06 0 5 10 15 20 25 30 35 Figure 16 - Diag Blanking time (S) Vs Iout (A) (resistive load - see Fig. 6) Figure 17 - Icc (mA) Vs Vcc (V) www.irf.com 9 IPS511G/IPS512G Case Outline - IPS511G 8 Lead SOIC (MS-012AA) 01-0021 09 10 www.irf.com IPS511G/IPS512G Case Outline 16 Lead SOIC (narrow body) 01-3064 00 IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd., Whyteleafe, Surrey CR3 0BL, United Kingdom Tel: ++ 44 (0) 20 8645 8000 IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo, Japan 171-0021 Tel: 8133 983 0086 IR HONG KONG: Unit 308, #F, New East Ocean Centre, No. 9 Science Museum Road, Tsimshatsui East, Kowloon Hong Kong Tel: (852) 2803-7380 Data and specifications subject to change without notice. 5/9/2000 www.irf.com 11 |
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